Publications
My Google Scholar PageMy IBM Publications Page
2024
A.S. Cassidy, J.V. Arthur, F. Akopyan, A. Andreopoulos, R. Appuswamy, P. Datta, et al (2024). IBM NorthPole: An Archicture for Neural Network Inference with a 12nm Chip. IEEE International Solid-State Circuits Conference, ISSCC.Invited Paper
2023
D.S. Modha, F. Akopyan*, A. Andreopoulos*, R. Appuswamy*, J.V. Arthur*, A.S. Cassidy*, P. Datta*, M. V. DeBole*, S.K. Esser*, C. Ortega Otero*, J. Sawada*, B. Taba*, A. Amir, D. Blablani, P. Carlson, M. Flickner, R. Gandhasri, G. Garreau, M. Ito, J. Klamo, J. Kusnitz, N. McClatchey, J. McKinstry, Y. Nakamura, T. Nayak, W. Risk, K. Schleupen, B. Shaw, J. Sivagnaname, D. Smith, I. Terrizzano, T. Ueda (2023). (2014). "Neural inference at the frontier of energy, space, and time". Science 19 October 2023, 329-35. *These authors contributed equally.Featured Story
D.S. Modha, F. Akopyan*, A. Andreopoulos*, R. Appuswamy*, J.V. Arthur*, A.S. Cassidy*, P. Datta*, M. V. DeBole*, S.K. Esser*, C. Ortega Otero*, J. Sawada*, B. Taba*, et al (2023). "IBM NorthPole Neural Inference Machine". 2023 IEEE Hot Chips 35 Symposium (HCS). *These authors contributed equally.
2019
M. V. DeBole, B. Taba, A. Amir, et al (2019). TrueNorth: Accelerating From Zero to 64 Million Neurons in 10 Years. IEEE Computer.J.L. Mckinstry, S.E. Esser, R. Appuswamy, et al (2019). Discovering Low-Precision Networks Close to Full-Precision Networks for Efficient Inference. 2019 Fifth Workshop on Energy Efficient Machine Learning and Cognitive Computing - NeurIPS Edition (EMC2-NIPS) (arxiv preprint).
2018
J.L. Mckinstry, D.R. Barch, D. Bablani, et al (2018). Low Precision Policy Distillation with Application to Low-Power, Real-time Sensation-Cognition-Action Loop with Neuromorphic Computing. arXiv:1809.09260.2017
W.Y. Tsai, D. Barch, A. Cassidy, et al (2017). "Always-on Speech Recognition using TrueNorth, a Reconfigurable, Neurosynaptic Processor". IEEE Transactions on Computers.2016
J. Sawada, F. Akopyan, A. Cassidy, et al (2016). Truenorth ecosystem for brain-inspired computing: scalable systems, software, and applications.. Proceedings of the international conference for high performance computing, networking, storage and analysis.R. Appuswamy, T. Nayak, J.V. Arthur, et al (2016). Structured Convolution Matrices for Energy-efficient Deep learning. arXiv:1606.02407.
P. Merolla, R. Appuswamy, J.V. Arthur, S.K. Esser, and D.S. Modha (2016). Deep neural networks are robust to weight binarization and other non-linear distortions. arXiv:1606.01981.
A.G. Andreou, A.A. Dykman, K.D. Fischl, et al (2016). "Real-time sensory information processing using the TrueNorth neurosynaptic system". IEEE International Symposium on Circuits and Systems, ISCAS.
Late Breaking News, acceptance rate less than 9%
S.K. Esser, P.A. Merolla, J.V. Arthur, et al (2016). "Convolutional Networks for Fast, Energy-Efficient Neuromorphic Computing". PNAS 113 (41) 11441-11446 (arxiv preprint).
Featured commentary
2015
S.K. Esser, R. Appuswamy, P. Merolla, J.V. Arthur, D.S. Modha (2015). "Backpropagation for energy-efficient neuromorphic computing." Adv. Neural Inf. Process. Syst. 28 (NeurIPS). (spotlight presentation),Ranked among top ~5% of submissions
F. Akopyan, J. Sawada, A. Cassidy, et al (2015). "TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip.". Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, IEEE.
Keynote paper
B.U. Pedroni, S. Das, J.V. Arthur, P.A. Merolla, B.L. Jackson, D.S. Modha, K. Kreutz-Delgado, G. Cauwenberghs (2015). "Mapping Generative Models onto Networks of Digital Spiking Neurons". arXiv:1509.07302.
S. Das, B.U. Pedroni, P. Merolla, J.V. Arthur, A.S. Cassidy, B.L. Jackson, D.S. Modha, G. Cauwenberghs, K. Kreutz-Delgado (2015). "Gibbs sampling with low-power spiking digital neurons". IEEE International Symposium on Circuits and Systems, ISCAS.
A. Andreopoulos, B. Taba, A.S. Cassidy, et al (2015). Visual saliency on networks of neurosynaptic cores. IBM Journal of Research and Development 59 (2/3), 1-9
2014
A.S. Cassidy, R. Alvarez-Icaza, F. Akopyan, et al (2014). "Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100x Speedup in Time-to-Solution and ~100,000x Reduction in Energy-to-Solution". Proceedings of the international conference for high performance computing, networking, storage and analysis.ACM Gordon Bell Finalists
P.A. Merolla*, J.V. Arthur*, R. Alvarez-Icaza*, A.S. Cassidy*, J. Sawada*, F. Akopyan*, B.L. Jackson*, N. Imam, C. Guo, Y. Nakamura, B. Brezzo, I. Vo, S.K. Esser, R. Appuswamy, B. Taba, A. Amir, M.D. Flickner, W.P. Risk, R. Manohar, D.S. Modha (2014). "A million spiking-neuron integrated circuit with a scalable communication network and interface". Science 8 August 2014, 668-73. *These authors contributed equally.
Cover plus Feature Story
B.V. Benjamin, P. Gao, E. McQuinn, S. Choudhary, A.R. Chandrasekaran, J. Bussat, R. Alvarez-Icaza, J.V. Arthur, P.A. Merolla, K. Boahen (2014). "Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations". IEEE Proceedings.
P. Merolla, J.V. Arthur, R. Alvarez, J-M Bussat, K. Boahen (2014). "A multicast tree router for multichip neuromorphic systems". Circuits and Systems I: Regular Papers, IEEE Transactions on, IEEE.
2013
A.C. Cassidy, P.A. Merolla, J.V. Arthur, et al (2013). "Cognitive Computing Building Block: A Versatile and Efficient Digital Neuron Model for Neurosynaptic Cores". Neural Networks (IJCNN), International Joint Conference on.S.K. Esser, A. Andreopoulos, R. Appuswamy, et al (2013). "Cognitive Computing Systems: Algorithms and Applications for Networks of Neurosynaptic Cores". Neural Networks (IJCNN), International Joint Conference on.
2012
N. Imam, T.A. Cleland, R. Manohar, P.A. Merolla, J.V. Arthur, F. Akopyan, D.S. Modha (2012). "Implementation of olfactory bulb glomerular-layer computations in a digital neurosynaptic core". Frontiers in Neuroscience, Frontiers Media.J.V. Arthur, P.A. Merolla, F. Akopyan, et al (2012). "Building block of a programmable neuromorphic substrate: A digital neurosynaptic cores". Neural Networks (IJCNN), International Joint Conference on.
N. Imam, F. Akopyan, J. Arthur, P. Merolla, R. Manohar, D.S. Modha (2012). "A Digital Neurosynaptic Core Using Event-Driven QDI Circuits". Asynchronous Circuits and Systems (ASYNC), 2012 18th IEEE International Symposium on, pp. 25--32.
Best paper award
B.V. Benjamin, J.V. Arthur, P. Gao, P. Merolla, K. Boahen (2012). "A Superposable Silicon Synapse with Programmable Reversal Potential". International Conference of the IEEE Engineering and Medicine in Biology Society.
2011
J.V. Arthur, K.A. Boahen (2011). "Silicon-neuron design: A dynamical systems approach". Circuits and Systems I: Regular Papers, IEEE Transactions on 58(5), 1034--1043, IEEEP. Merolla, J. Arthur, F. Akopyan, N. Imam, R. Manohar, D.S. Modh (2011). "A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm". Custom Integrated Circuits Conference (CICC), IEEE.
G. Indiveri, B. Linares-Barranco, T.J. Hamilton, et al (2011). "Neuromorphic silicon neuron circuits". Frontiers in Neuroscience, Frontiers Media.
2010
D. Sridharan, S. Millner, J. Arthur, K. Boahen (2010). "Robust spatial working memory through inhibitory gamma synchrony". COSYNE: Computational and systems neuroscience (abstract), in Frontiers in Systems Neuroscience special issue,(spotlight presentation)
Ranked among top 5% of submissions
P. Merolla, T. Ursell, J. Arthur (2010). "The thermodynamic temperature of a rhythmic spiking network". arXiv:1009.5473.
2008
D. Sridharan, B. Percival, J. Arthur, K. Boahen (2008). "An in-silico neural model of dynamic routing through neuronal coherence". Adv. Neural Inf. Process. Syst. 20 (NeurIPS). (spotlight presentation),Ranked among top 10% of submissions
2007
J.V. Arthur, K.A. Boahen (2007). "Synchrony in silicon: The gamma rhythm". Neural Networks, IEEE Transactions on 18(6), 1815--1825.P.A. Merolla, J.V. Arthur, B.E. Shi, K.A. Boahen (2007). "Expandable networks for neuromorphic chips". Circuits and Systems I: Regular Papers, IEEE Transactions on 54(2), 301--311.
2006
J.V. Arthur, K.A. Boahen (2006). "Learning in Silicon: Timing is Everything". Adv. Neural Inf. Process. Syst. 18 (NeurIPS). (oral presentation),Ranked among top 2% of submissions
J.V. Arthur, K.A. Boahen (2006). "Silicon neurons that inhibit to synchronize". IEEE International Symposium on Circuits and Systems, ISCAS.
J. Lin, P. Merolla, J. Arthur, K. Boahen (2006). "Programmable Connections in Neuromorphic Grids". Circuits and Systems. MWSCAS. 49th IEEE International Midwest Symposium on, 80-84.
2005
T.Y.W. Choi, P.A. Merolla, J.V. Arthur, K.A. Boahen, B.E. Shi (2005). "Neuromorphic implementation of orientation hypercolumns". Circuits and Systems I: Regular Papers, IEEE Transactions on 52(6), 1049--1060.P. Merolla, J. Arthur, J. Wittig (2005). "The USB Revolution". Institute of Neuromorphic Engineering Newsletter.
2004
J.V. Arthur, K.A. Boahen (2004). "Recurrently Connected Silicon Neurons with Active Dendrites for One-Shot Learning". Neural Networks (IJCNN), International Joint Conference on.More
|
|
John Arthur |
